The Marvell Microarchitecture

Marvell Sheeva CPU Technology

Marvell's Sheeva CPUs are ARM instruction set compliant. This means that they understand any software that is designed for the ARM instruction set. ARM has become a de facto industry standard for embedded CPUs and many software developers focus their efforts on creating programs that run on ARM instruction set compliant CPUs. As a result, there is a huge, global ARM ecosystem of companies and independent developers building programs for this platform.

In order to program a CPU, you have to speak its language. This language is referred to as the instruction set. Software can be thought of as a long list of instructions. At a basic level, CPUs execute these instructions one after another from this list.

Architecture vs Microarchitecture

Just as there are many different models of cars, there are several versions of ARM instruction set compliant CPUs. What sets one apart from another is the internal design, or the microarchitecture—of the CPU. Mircoarchitecture refers to the internal electrical circuitry of the CPU. Marvell utilizes ARM instruction set compatibility as a foundation for building CPU cores that feature a unique, high-performance, low-power Marvell microarchitecture. This microarchitecture is tailor-made for today's embedded applications that demand high-performance together with low power consumption.

One major function of a CPU's architecture is to define the types of instructions that software programs can pass to the CPU. This critical piece allows software to be written for each specific CPU. By targeting an application to specific hardware architectures, a software developer can expect his or her program to run without problems on any CPU that implements that particular architecture. The architecture also defines various other aspects that enable software to work with the CPU.

Section 3: RISC Computing

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